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Power application test apparatus and method of mixing logic circuit of conventional and boundary-scan

机译:常规和边界扫描混合逻辑电路的电源测试设备和方法

摘要

PURPOSE: To provide a method for testing a circuit board having both of a boundary scanning(BS) element and a non-boundary scanning(NBS) element. ;CONSTITUTION: BS nodes 31A-31D are distinguished from NBS nodes 32A-32C, a large number of pairs of NBS nodes which are within a prescribed distance R from element pins to be joined with BS nodes are determined by utilizing a Cartesian coordinates (X, Y) of all pins of all elements on a circuit board. The number of the NBS node are divided into independent groups to be tested in parallel. Drivers 37 for the BS elements are forced to be in a first logical state and respective NBS nodes are formed in logical state for respective short periods and NBS node tests are carried out independently in parallel, so that the testing cycle is carried out. Receivers 38 on the BS elements capture response vector within a short period and the results are scanned and sent out of the circuit board for evaluation.;COPYRIGHT: (C)1995,JPO
机译:目的:提供一种用于测试具有边界扫描(BS)元件和非边界扫描(NBS)元件的电路板的方法。 ;组成:BS节点31A-31D与NBS节点32A-32C有所区别,通过使用笛卡尔坐标(X ,Y)电路板上所有元件的所有引脚。 NBS节点的数量分为多个独立的组,以进行并行测试。 BS元件的驱动器37被迫处于第一逻辑状态,并且相应的NBS节点在相应的短周期内被形成为逻辑状态,并且NBS节点测试被并行地独立执行,从而执行测试周期。 BS元件上的接收器38在短时间内捕获响应向量,并将结果扫描并发送到电路板外进行评估。;版权所有:(C)1995,JPO

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