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Bump for semiconductor package, semiconductor package applying the bump, and method for fabricating the semiconductor package

机译:用于半导体封装的凸块,应用该凸块的半导体封装以及制造该半导体封装的方法

摘要

The present invention discloses a bump for a semiconductor package, a semiconductor package applying the bump, and a method for fabricating the semiconductor package. As a second bump unit contacting an electrode terminal of a PCB has a smaller width than a first bump unit contacting an electrode pad of a semiconductor chip through a metal adhering layer, even if a pitch between the electrode pads of the semiconductor chip does not correspond to the pitch between the electrode terminals of the PCB, contact reliability is improved by the bump. In addition, the bump does not contact lines adjacent to the electrode terminal of the PCB, thereby preventing a mis-operation of the semiconductor package. Accordingly, the pitch between the electrode pads of the semiconductor chip and the pitch between the bumps can be minimized.
机译:本发明公开了一种用于半导体封装的凸块,使用该凸块的半导体封装以及用于制造该半导体封装的方法。由于接触PCB的电极端子的第二凸块单元的宽度小于通过金属粘附层接触半导体芯片的电极焊盘的第一凸块单元的宽度,即使半导体芯片的电极焊盘之间的间距不对应相对于PCB电极端子之间的间距,凸点提高了接触可靠性。另外,凸块不接触与PCB的电极端子相邻的线,从而防止了半导体封装的误操作。因此,可以使半导体芯片的电极焊盘之间的间距和凸块之间的间距最小化。

著录项

  • 公开/公告号US2005224991A1

    专利类型

  • 公开/公告日2005-10-13

    原文格式PDF

  • 申请/专利权人 YONG-WOON YEO;

    申请/专利号US20040976427

  • 发明设计人 YONG-WOON YEO;

    申请日2004-10-29

  • 分类号H01L23/48;

  • 国家 US

  • 入库时间 2022-08-21 22:25:59

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