Additive phase detector and its use in high speed phase-locked loops

摘要

An apparatus is disclosed that is an analog phase detector where a summation technique is used to determine the phase difference of the two input waveforms of the phase detector. Instead of multiplying the two signals—a technique used in the prior art—a difference amplifier subtracts one waveform from the other. The difference amplifier produces a waveform whose maximum peak-to-peak amplitude is directly proportional to the phase difference. Feeding this waveform into an envelope detector followed by a low pass filter, we are able to get a DC voltage level that is directly proportional to the phase difference of the two input waveforms.