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Method for forming a SiGe heterojunction bipolar transistor having reduced base resistance

机译:具有减小的基极电阻的SiGe异质结双极晶体管的形成方法

摘要

A method for forming a heterojunction bipolar transistor includes forming an epitaxial layer, forming a first polysilicon layer, and forming a dielectric layer on the first polysilicon layer. The first polysilicon layer and the dielectric layer include an opening for exposing a portion of the top surface of the epitaxial layer. Then, a silicon germanium layer is selectively grown in the opening. The silicon germanium layer is grown on the exposed top surface of the epitaxial layer and on the exposed sidewall of the first polysilicon layer. Next, a spacer is formed along the sidewalls of the dielectric layer and the silicon germanium layer. A second polysilicon layer in electrical contact with the silicon germanium layer is then formed. Accordingly, a low resistance connection between the first polysilicon layer forming the extrinsic base region and the silicon germanium layer forming the intrinsic base region of the transistor is formed.
机译:用于形成异质结双极晶体管的方法包括:形成外延层;形成第一多晶硅层;以及在第一多晶硅层上形成电介质层。第一多晶硅层和介电层包括用于暴露外延层的顶表面的一部分的开口。然后,在开口中选择性地生长硅锗层。硅锗层生长在外延层的暴露的顶表面上和第一多晶硅层的暴露的侧壁上。接下来,沿着电介质层和硅锗层的侧壁形成间隔件。然后形成与硅锗层电接触的第二多晶硅层。因此,在形成非本征基极区的第一多晶硅层与形成晶体管的本征基极区的硅锗层之间形成了低电阻连接。

著录项

  • 公开/公告号US6861323B2

    专利类型

  • 公开/公告日2005-03-01

    原文格式PDF

  • 申请/专利权人 JAY A. SHIDELER;

    申请/专利号US20030371932

  • 发明设计人 JAY A. SHIDELER;

    申请日2003-02-21

  • 分类号H01L21/331;

  • 国家 US

  • 入库时间 2022-08-21 22:19:33

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