首页>
外国专利>
SERIAL BUS INTERFACE AND METHOD FOR SERIALLY INTERCONNECTING TIME-CRITICAL DIGITAL DEVICES
SERIAL BUS INTERFACE AND METHOD FOR SERIALLY INTERCONNECTING TIME-CRITICAL DIGITAL DEVICES
展开▼
机译:时序总线数字设备串行互连的串行总线接口和方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
The disclosed serial bus interface keeps most the time a driver buffer of thebus master active, except of a defined interval where a response from theslave is expected. This guarantees that a request echo of a request packetsent from the master reflected on a far non-terminated end of the slave getsterminated. The traveling time for such signal echoes can be defined by thedistance in wire length between the master and the slave and/or the electricalcharacteristics of the transmission line. The slave can receive the requestpacket, add some processing time and send a response delayed by a programmabledelay element. The response packet can arrive at the master after a furthertraveling delay. At that time, the request echo is already terminated and doesno more disturb the data transmission. A programmable delay clement moves theabove mentioned interval exactly to that point where a response packet arrivesat the master. After such response was received, the driver buffer getsactivated again while an according driver buffer on the slave side getsdeactivated. Due to an active termination, a response echo gets canceled aftera further round trip. During that time, any input on a receiver buffer on theslave side is ignored.
展开▼