METHOD OF FABRICATING NAND FLASH MEMORY DEVICE TO FORM COMMON SOURCE LINE AND REDUCE RESISTANCE OF COMMON SOURCE LINE

摘要

Purpose: it is a kind of to be arranged to minimize a resistance of a common source line by forming common source line as a conductor layer for control door for manufacturing the method for a fast-flash memory body memory, there is a lower resistance. Construction: a region of activation is defined by forming a separation layer in a field region of semi-conductive substrate (31). One common source line region is connected to region of activation. A polysilicon layer for floating gate is formed on it. Polysilicon layer carries out one etch process of patterning, uses a floating gate mask. The region of activation in common source line region is exposed. Multiple cell origin regions (33S) and multiple ion implantation regions are formed in exposed region of activation. One dielectric layer (53) is formed in the whole surface of composite structure. Dielectric layer is removed from cell origin region and ion implantation region by an etch process. A conductor layer (54) for controlling door is formed in the whole surface of composite structure. Multiple doors are formed in a cell region and a peripheral circuit region. Conductor layer for controlling door is formed in the line patterns on cell origin region and ion implantation region, so that a common source line is formed.