首页> 外国专利> METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH STABLE SILICIDE LAYER ON MINIMUM INTERVAL PORTION BETWEEN POLY GATES FOR IMPROVING DESIGN RULE

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH STABLE SILICIDE LAYER ON MINIMUM INTERVAL PORTION BETWEEN POLY GATES FOR IMPROVING DESIGN RULE

机译:在多片门之间的最小间隔部分上制造具有稳定硅化物层的半导体器件的方法,以改进设计规则

摘要

PURPOSE: A method of manufacturing a semiconductor device is provided to improve a design rule by forming stably a silicide layer on a minimum interval portion between poly gates. CONSTITUTION: A gate oxide layer(106) and a gate electrode(108) are sequentially formed on a silicon substrate(100). A first oxide spacer(110), a nitride spacer(112) and a second oxide spacer(114) are sequentially formed at both sidewalls of the gate electrode. A first N+ source/drain ion-implantation is performed on the resultant structure by using an N+ source/drain mask. The second oxide spacer is removed by performing etching using a diluted BOE(Buffered Oxide Etchant) under the same N+ source/drain mask condition, so that a stable silicide layer is capable of being formed thereon.
机译:目的:提供一种制造半导体器件的方法,以通过在多晶硅栅之间的最小间隔部分上稳定地形成硅化物层来改善设计规则。组成:栅氧化层(106)和栅电极(108)依次形成在硅衬底(100)上。在栅电极的两个侧壁处顺序地形成第一氧化物隔离物(110),氮化物隔离物(112)和第二氧化物隔离物(114)。通过使用N +源极/漏极掩模对所得结构进行第一N +源极/漏极离子注入。通过在相同的N +源极/漏极掩模条件下使用稀释的BOE(缓冲氧化物蚀刻剂)执行蚀刻来去除第二氧化物间隔物,从而能够在其上形成稳定的硅化物层。

著录项

  • 公开/公告号KR20050011086A

    专利类型

  • 公开/公告日2005-01-29

    原文格式PDF

  • 申请/专利权人 MAGNACHIP SEMICONDUCTOR LTD.;

    申请/专利号KR20030049928

  • 发明设计人 LEE HEUI SEUNG;

    申请日2003-07-21

  • 分类号H01L21/335;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:54

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号