首页> 外国专利> METHOD FOR FABRICATING SHALLOW TRENCH ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO REUSE DEFECTIVE SUBSTRATE AND REDUCE DEFECTIVE PROPORTION OF SEMICONDUCTOR SUBSTRATE

METHOD FOR FABRICATING SHALLOW TRENCH ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO REUSE DEFECTIVE SUBSTRATE AND REDUCE DEFECTIVE PROPORTION OF SEMICONDUCTOR SUBSTRATE

机译:制造半导体器件浅沟槽隔离层以重复使用有缺陷的基质并减少有缺陷的基质的方法

摘要

PURPOSE: A method for fabricating a shallow trench isolation layer of a semiconductor device is provided to reuse a defective substrate and reduce a defective proportion of a semiconductor substrate by performing a gap-fill insulation deposition process after an additional deposition process of a liner insulation layer is performed to compensate to the thickness of the liner insulation layer. CONSTITUTION: A pad insulation layer(102) and a hard mask layer are sequentially formed and patterned on a semiconductor substrate(100). A predetermined depth of the semiconductor substrate exposed by the hard mask layer pattern and the pad insulation layer pattern is etched to form a trench(106). A liner insulation layer(108a) is formed on the substrate in the inner side surface of the trench. A cleaning process is performed on the resultant structure to reduce the height and the side surface of the hard mask layer pattern and the pad insulation layer pattern and to decrease the thickness of the liner insulation layer. The liner insulation layer on the inner side surface of the trench is compensated to have a predetermined thickness. A gap-fill insulation layer is formed to completely fill the trench.
机译:目的:提供一种用于制造半导体器件的浅沟槽隔离层的方法,以通过在衬垫绝缘层的附加沉积工艺之后执行间隙填充绝缘沉积工艺来重复使用有缺陷的衬底并减少半导体衬底的有缺陷的比例。执行该步骤以补偿衬里绝缘层的厚度。构成:在半导体衬底(100)上依次形成焊盘绝缘层(102)和硬掩模层并对其构图。蚀刻由硬掩模层图案和焊盘绝缘层图案暴露的预定深度的半导体衬底,以形成沟槽(106)。在沟槽的内侧表面上的衬底上形成衬垫绝缘层(108a)。在所得结构上执行清洁工艺以减小硬掩模层图案和焊盘绝缘层图案的高度和侧面,并减小衬垫绝缘层的厚度。沟槽的内侧表面上的衬垫绝缘层被补偿为具有预定的厚度。形成间隙填充绝缘层以完全填充沟槽。

著录项

  • 公开/公告号KR20050022437A

    专利类型

  • 公开/公告日2005-03-08

    原文格式PDF

  • 申请/专利权人 DONGBUANAM SEMICONDUCTOR INC.;

    申请/专利号KR20030060637

  • 发明设计人 KIM SUNG RAE;

    申请日2003-08-30

  • 分类号H01L21/76;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:43

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