首页> 外国专利> METHOD FOR FORMING METAL INTERCONNECTION OF SEMICONDUCTOR DEVICE TO IMPROVE ELECTRICAL CHARACTERISTIC OF METAL INTERCONNECTION

METHOD FOR FORMING METAL INTERCONNECTION OF SEMICONDUCTOR DEVICE TO IMPROVE ELECTRICAL CHARACTERISTIC OF METAL INTERCONNECTION

机译:形成半导体装置的金属互连以改善金属互连的电特性的方法

摘要

PURPOSE: A method for forming a metal interconnection of a semiconductor device is provided to improve an electrical characteristic of a metal interconnection by filling a metal material in contact holes with different depths. CONSTITUTION: A plurality of lower metal interconnections(12) are formed on a substrate(11) having a step in a cell region and a peripheral circuit region. After the first insulation layer(13A) is formed on the resultant structure, a plurality of the first contact holes to which the lower metal interconnections in the peripheral circuit region are formed. A metal pillar(15A) is formed in the first contact hole. The second insulation layer(13B) is formed on the resultant structure, and an interlayer dielectric(13) composed of the first and second insulation layers is formed. The interlayer dielectric is etched by an etch process until the upper end part of the metal pillar is exposed. A selected part of the interlayer dielectric is etched to form a plurality of the second contact holes to which each lower metal interconnection in the cell region is exposed. An upper metal interconnection(17) is formed.
机译:目的:提供一种用于形成半导体器件的金属互连的方法,以通过将金属材料填充在具有不同深度的接触孔中来改善金属互连的电特性。构成:多个下部金属互连(12)形成在衬底(11)上,该衬底在单元区域和外围电路区域中具有台阶。在所得结构上形成第一绝缘层(13A)之后,在外围电路区域中形成有下部金属互连的多个第一接触孔。在第一接触孔中形成金属柱(15A)。在所得结构上形成第二绝缘层(13B),并且形成由第一绝缘层和第二绝缘层组成的层间电介质(13)。通过蚀刻工艺蚀刻层间电介质,直到露出金属柱的上端部分。蚀刻层间电介质的选定部分以形成多个第二接触孔,单元区域中的每个下部金属互连暴露于该第二接触孔。形成上部金属互连(17)。

著录项

  • 公开/公告号KR100457407B1

    专利类型

  • 公开/公告日2005-02-23

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR19970079270

  • 发明设计人 LEE SANG HWA;

    申请日1997-12-30

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 22:04:16

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