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Digital Phase-Locked Loop and Noise Reduction Method with Noise Rejection

机译:带有噪声抑制的数字锁相环和降噪方法

摘要

Disclosed are a digital phase locked loop and a noise canceling method having a noise canceling function. The digital phase-locked loop having a noise canceling function according to the present invention comprises a phase comparison means for comparing a phase difference between an E.F.M signal and a divided oscillation frequency signal and outputting an up signal or a down signal corresponding to the phase difference, A charge pump, a charge pump that supplies or sinks current in response to a signal and a down signal, or inverts an up and down signal in response to a control signal, and sinks or supplies a current in response to an inverted up and down signal. A low pass filter for filtering the output and outputting the signal as a direct current signal; a voltage controlled oscillation means for generating an oscillation frequency signal having an oscillation frequency in response to a direct current signal; and dividing the oscillation frequency signal at a predetermined rate, A division means for outputting to the phase comparison means and a low frequency noise component in the E.F.M signal And low frequency detection means for outputting a control signal for controlling the charge pump in response to the detected result.
机译:公开了一种数字锁相环和具有噪声消除功能的噪声消除方法。根据本发明的具有噪声消除功能的数字锁相环包括相位比较装置,用于比较EFM信号和分频后的振荡频率信号之间的相位差并输出与该相位差相对应的上信号或下信号,电荷泵,一种电荷泵,其响应于信号和下降信号而提供或吸收电流,或者响应于控制信号而使上下信号反相,并且响应于反向的上升和下降而吸收或提供电流。下信号。低通滤波器,用于对输出进行滤波并作为直流信号输出;电压控制振荡装置,用于响应于直流信号而产生具有振荡频率的振荡频率信号;然后,以预定的速率对振荡频率信号进行分频;分频装置,用于向相位比较装置和EFM信号中的低频噪声分量输出;以及低频检测装置,用于响应于输出信号而输出用于控制电荷泵的控制信号。检测结果。

著录项

  • 公开/公告号KR100474988B1

    专利类型

  • 公开/公告日2005-06-07

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR19970032893

  • 发明设计人 심태현;

    申请日1997-07-15

  • 分类号G11B20/10;

  • 国家 KR

  • 入库时间 2022-08-21 22:04:04

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