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Precharge control circuit for controlling write recover timetWR according to operating frequency of semiconductor memory device and the method to control write recover timetWR
Precharge control circuit for controlling write recover timetWR according to operating frequency of semiconductor memory device and the method to control write recover timetWR
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机译:根据半导体存储器件的工作频率控制写恢复时间tWR的预充电控制电路和控制写恢复时间tWR的方法
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摘要
The write recovery time (tWR) free the charge control circuit and the write recovery time of controlling according to the operating frequency of the semiconductor memory device (tWR) control method is disclosed. Free the charge control circuit of the present invention includes a first-stage path, second path, however, the charge-free mode selection unit, the charge enable free portion, the charge-free signal generating unit, and the feedback uncle. Relative to the operating frequency of the semiconductor memory device, the latency signal when the operation when operating at a high clock frequency to the first logic level, and a low frequency is set to the second logic level. The first path end is a latency signal is a first logic level one time, the data write operation in response to a write signal indicating the ended and generates the output, the second path only in response to a write signal when the latency signal is a second logic level, and it generates an output. Free the charge enable blowing free the charge mode selection unit generates an output in free the charge enable signal, free the charge signal generator comprises a write signal, a first stage output, the second stage output, and a free path to route the charge of in response to the enable signal and generates a signal indicative of the charge-free to free the charge operation. Accordingly, the present invention is due to perform the charge-free operation in response to the latency signal having a clock frequency information, secured margin of the write recovery time (tWR) and performs the charge-free operation without excess of a clock cycle.
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