首页> 外国专利> Precharge control circuit for controlling write recover timetWR according to operating frequency of semiconductor memory device and the method to control write recover timetWR

Precharge control circuit for controlling write recover timetWR according to operating frequency of semiconductor memory device and the method to control write recover timetWR

机译:根据半导体存储器件的工作频率控制写恢复时间tWR的预充电控制电路和控制写恢复时间tWR的方法

摘要

The write recovery time (tWR) free the charge control circuit and the write recovery time of controlling according to the operating frequency of the semiconductor memory device (tWR) control method is disclosed. Free the charge control circuit of the present invention includes a first-stage path, second path, however, the charge-free mode selection unit, the charge enable free portion, the charge-free signal generating unit, and the feedback uncle. Relative to the operating frequency of the semiconductor memory device, the latency signal when the operation when operating at a high clock frequency to the first logic level, and a low frequency is set to the second logic level. The first path end is a latency signal is a first logic level one time, the data write operation in response to a write signal indicating the ended and generates the output, the second path only in response to a write signal when the latency signal is a second logic level, and it generates an output. Free the charge enable blowing free the charge mode selection unit generates an output in free the charge enable signal, free the charge signal generator comprises a write signal, a first stage output, the second stage output, and a free path to route the charge of in response to the enable signal and generates a signal indicative of the charge-free to free the charge operation. Accordingly, the present invention is due to perform the charge-free operation in response to the latency signal having a clock frequency information, secured margin of the write recovery time (tWR) and performs the charge-free operation without excess of a clock cycle.
机译:公开了释放电荷控制电路的写恢复时间(tWR)和根据半导体存储器件的工作频率进行控制的写恢复时间(tWR)控制方法。自由的本发明的充电控制电路包括第一级路径,第二路径,但是,无电荷模式选择单元,无电荷允许部分,无电荷信号生成单元和反馈叔。相对于半导体存储器件的工作频率,当以高时钟频率工作到第一逻辑电平并且以低频工作时的等待时间信号被设置为第二逻辑电平。第一路径的末端是等待时间信号,它是第一逻辑电平的一次,数据写入操作响应于指示结束的写入信号并生成输出,第二路径仅当等待时间信号是输出信号时才响应写入信号第二逻辑电平,并生成输出。释放电荷使能释放电荷模式选择单元释放电荷使能信号的输出,释放电荷信号产生器包括写信号,第一级输出,第二级输出以及用于路由电荷的自由路径。响应使能信号并产生表示无电荷的信号以释放充电操作。因此,本发明归因于响应于具有时钟频率信息的等待时间信号执行无电荷操作,确保了写恢复时间(tWR)的余量,并且在不超过时钟周期的情况下执行了无电荷操作。

著录项

  • 公开/公告号KR100487522B1

    专利类型

  • 公开/公告日2005-05-03

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20020017757

  • 发明设计人 이호철;박상균;

    申请日2002-04-01

  • 分类号G11C11/4063;

  • 国家 KR

  • 入库时间 2022-08-21 22:03:51

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