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PCI BUS CONTROLLER WITH SLAVE TEST BUS CONTROL FUNCTION
PCI BUS CONTROLLER WITH SLAVE TEST BUS CONTROL FUNCTION
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机译:具有从站测试总线控制功能的PCI总线控制器
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摘要
PURPOSE: A PCI(Peripheral Component Interconnect) bus controller having a slave test bus controlling function is provided to perform the PCI bus control and the test bus control at the same time by integrating the PCI bus controller and an ASP(Address Scan Port). CONSTITUTION: A PCI bus controller block(10) includes a PCI bus controller core(11), a BSC(Boundary Scan Cell)(12), and a TAP(Test Access Port)(13). A back-end logic(200) connected to a single board(100) performs a specified process for general operations and gets to be a test board for the process when the test operation is performed. The PCI bus controller core controls communication between the back-end logic and other board or the processor connected to the PCI bus. A TBC(Test Bus Controller) slave core(20) enables the test by connecting the back-end logic with a TBC master. A board address setting part(300) comprises a dip switch or a jumper enabling the user to optionally select the board.
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