FIFO or first-in first-out shift register has a circuit arrangement with register elements each having a memory element of a masking memory for storage of first and second validity information

摘要

First-in first-out (FIFO) shift register has register elements each with a memory element of a masking memory for storage of a valid datum with first or second validity information. Register element and memory element are connected in such a way that when a read access is made to the memory element, the datum is shifted to the next register element.