Thin film transistor array substrate for liquid crystal display device, comprises thin film transistor including gate insulating layer and ohmic contact layer, where gate insulating layer includes gate insulating pattern

摘要

A thin film transistor array substrate comprises a thin film transistor (106) including a gate insulating layer, a semiconductor layer, an ohmic contact layer (150), and a source electrode (110) and a drain electrode (112), where the gate insulating layer includes a gate insulating pattern (146) underlying a data line (104) and a transparent electrode material, and covering a gate line (102). A thin film transistor array substrate comprises a gate line formed on a substrate; a data line formed on the substrate intersecting with the gate line to define a pixel region; a thin film transistor formed at the intersection of the gate line and the data line, the thin film transistor including gate electrode (108) formed on the substrate, a gate insulating layer formed on the gate electrode and the substrate, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer on the semiconductor layer, and a source electrode and a drain electrode on the ohmic contact layer; and a transparent electrode material within the pixel region and connected to the drain electrode of the thin film transistor, where the gate insulating layer includes a gate insulating pattern underlying the data line and the transparent electrode material, and covering the gate line. An independent claim is also included for a method of fabricating a thin film transistor array substrate, comprising forming a first conductive pattern group including a gate line, a gate pad (126), and a gate electrode of a thin film transistor, the thin film transistor connected to the gate line on a substrate; forming a gate insulating film on the substrate including the first conductive pattern group; forming a second conductive pattern group including a data line intersecting the gate line, a source electrode of the thin film transistor connected to the data line, and a drain electrode of the thin film transistor, an ohmic contact layer, and a semiconductor layer for forming a channel region of the thin film transistor; forming a third conductive pattern group including a transparent electrode material connected to the drain electrode; and etching the gate insulating film and the ohmic contact layer using the second and third conductive pattern groups as a mask.