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A frequency synthesizer and noise generator for generating gauss - noises with this a frequency synthesizer

机译:频率合成器和用于产生高斯的噪声发生器-带有频率合成器的噪声

摘要

PROBLEM TO BE SOLVED: To provide high resolving-power of frequencies over a wide band. ;SOLUTION: This synthesizer is provided with a waveform memory 21 for outputting the amplitude of the periodic function of a phase designated by the data of L bits, a frequency setting means 23 for setting the data of (K+L-1) bits, which are provided by dividing a desired output frequency with the frequency of a clock signal CK, as frequency data B, a counter 24 of K bits for counting the clock signal CK, L sets of product sum operating circuits 26(1)-26(L) for dividing the frequency data B from the frequency setting means 12 into L sets of K-bit data having the leading bits shifted one each, ORing the count output N of K bits of the counter 24 and a bit unit and finding the total number of bits in which the arithmetic result becomes '1', for each set, and a shift adder circuit 30 for adding respective total number data v0-vL-1 while shifting bits, and outputting the low-order L bits of the added result to the waveform memory 21.;COPYRIGHT: (C)2001,JPO
机译:要解决的问题:在宽带范围内提供较高的频率分辨能力。 ;解决方案:该合成器具有一个波形存储器21,用于输出由L个比特的数据指定的相位的周期函数的幅度;一个频率设置装置23,用于设置(K + L-1)个比特的数据,通过将期望的输出频率除以时钟信号CK的频率而得到的信号,作为频率数据B,具有用于计数时钟信号CK的K位的计数器24,L组乘积和运算电路26(1)-26( L),用于将来自频率设置装置12的频率数据B划分为K组数据,将K位数据的前导位各移位1个,对计数器24的K位的计数输出N和位单位进行“或”运算,求和对于每组,算术结果变为“ 1”的位数;以及移位加法器电路30,用于在移位位的同时将各个总数数据v0-vL-1相加,并输出相加结果的低位L位到波形存储器21 .;版权:(C)2001,JPO

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