SYSTEM, METHOD AND LOGICAL DEVICE FOR TIMING ANALYSIS CONSIDERING CROSSTALK

摘要

PPROBLEM TO BE SOLVED: To provide a timing analysis method capable of eliminating weak points caused by conventional circuit design and considering crosstalk. PSOLUTION: This method accesses design contents of a circuit to confirm critical paths in design. Each critical path is composed of one or more victim interconnections and one or more cells. The method confirms potential aggressor interconnections related to the respective victim interconnections to extract parasites of the victim interconnections for the respective potential aggressor interconnections and the potential aggressor interconnections. The method calculates timing windows of the potential aggressor interconnections to calculate each cell on each critical path and first timing of each victim interconnection. The method creates one or more timing waveforms of the potential aggressor interconnection for each critical path, follows the starting point of the critical path to the ending point thereof and calculates second timing of each cell and each victim interconnection. PCOPYRIGHT: (C)2006,JPO&NCIPI