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System, method and logic device for timing analysis considering crosstalk

机译:考虑串扰的时序分析系统,方法和逻辑装置

摘要

PROBLEM TO BE SOLVED: To provide a timing analysis method capable of eliminating weak points caused by conventional circuit design and considering crosstalk.;SOLUTION: This method accesses design contents of a circuit to confirm critical paths in design. Each critical path is composed of one or more victim interconnections and one or more cells. The method confirms potential aggressor interconnections related to the respective victim interconnections to extract parasites of the victim interconnections for the respective potential aggressor interconnections and the potential aggressor interconnections. The method calculates timing windows of the potential aggressor interconnections to calculate each cell on each critical path and first timing of each victim interconnection. The method creates one or more timing waveforms of the potential aggressor interconnection for each critical path, follows the starting point of the critical path to the ending point thereof and calculates second timing of each cell and each victim interconnection.;COPYRIGHT: (C)2006,JPO&NCIPI
机译:要解决的问题:提供一种时序分析方法,该方法能够消除常规电路设计引起的弱点并考虑串扰。解决方案:该方法访问电路的设计内容以确认设计中的关键路径。每条关键路径均由一个或多个受害互连和一个或多个单元组成。该方法确认与各个受害者互连有关的潜在侵略者互连,以提取针对各个潜在攻击者互连和潜在侵略者互连的受害者互连的寄生虫。该方法计算潜在攻击者互连的时序窗口,以计算每个关键路径上的每个单元以及每个受害者互连的第一时序。该方法为每个关键路径创建一个或多个潜在攻击者互连的时序波形,沿着关键路径的起点到终点,并计算每个单元和每个受害互连的第二时序。版权所有:(C)2006 ,JPO&NCIPI

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