Being the system which verifies the justifiability of the poly cycle passes which include the justifiability verification

摘要

PROBLEM TO BE SOLVED: To solve problems wherein there is no means for confirming propriety that FFs (flip-flop) with different cycles are mixed in a via-port of multi-cycle paths and not connected, etc., unconformity is caused in post-processes and design return is generated when the multi-cycle paths between modules are used in the conventional LSI design.;SOLUTION: This system for verifying property of multi-cycle path between modules is provided with a port information DB (data base) 23 for holding a port name and a name of an order circuit element at a connecting destination port restriction information 24 including a means for discriminating that a port is the one with n (n: 2, 3,...) cycles and restriction information to be applied to the order circuit element connected with the discriminated port, and a port check part 13 for referring to the port restriction information 24 for the respective ports of the port information DB 23, for acquiring the restriction information to be applied to the corresponding order circuit element when the ports are the ones with n cycle paths, for deciding whether the order circuit element satisfies the restriction and for outputting a name of a violated port.;COPYRIGHT: (C)2003,JPO