In order to realize an arithmetic device that reduces the number of elements of the arithmetic circuit and the delay time by a purely logical approach, the arithmetic operation method by encoding is specifically and efficiently designed to provide an encoded arithmetic device. If necessary, the arithmetic unit is expanded and treated as a logical function of the radix r. When r = 2, a generating function that is a new expression of the mapping is used, and under the encoding condition and the logical expression simplification condition The new arithmetic system is designed logically or the topology of the input / output relationship between the arithmetic unit of the original arithmetic system and the new arithmetic system is matched to design a new arithmetic system of the encoding arithmetic method. An arithmetic processing device that satisfies the encoding conditions and the logical expression simplification achieves high speed and low power consumption.
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