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Methods for reducing a thickness variation of a nitride layer formed in a shallow trench isolation CMP process and for forming a device isolation film of a semiconductor device
Methods for reducing a thickness variation of a nitride layer formed in a shallow trench isolation CMP process and for forming a device isolation film of a semiconductor device
A method for reducing a thickness variation of a nitride layer in a shallow trench isolation (STI) CMP process is provided, the method including forming an active region pattern in an alignment key region of a scribe lane where a device isolation film is formed at an ISO level, and forming a dummy active region pattern substantially adjacent to a vernier key pattern in the scribe lane during formation of the vernier key pattern, wherein the dummy active region pattern is spaced apart from the vernier key pattern by a known distance. Preferably, the active region pattern and the dummy active region pattern are formed prior to the STI CMP process.
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