Substrate engineering for optimum CMOS device performance

摘要

An integrated semiconductor structure having different types of complementary metal oxide semiconductor devices (CMOS), i.e., PFETs and NFETs, located atop a semiconductor substrate, wherein each CMOS device is fabricated such that the current flow for each device is optimal is provided. Specifically, the structure includes a semiconductor substrate that has a (110) surface orientation and a notch pointing in a 001 direction of current flow; and at least one PFET and at least one NFET located on the semiconductor substrate. The at least one PFET has a current flow in a 110 direction and the at least one NFET has a current flow in a 100 direction. The 110 direction is perpendicular to the 100 direction. A method of fabricating such as integrated semiconductor structure is also provided.