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Single event effect (SEE) tolerant circuit design strategy for SOI type technology
Single event effect (SEE) tolerant circuit design strategy for SOI type technology
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机译:SOI类型技术的单事件效果(SEE)容错电路设计策略
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摘要
A method of designing an integrated circuit to be Single Event Upset (SEU) immune by converting one or more Single Event Transient (SET) sensitive transistors into at least two serially connected transistors, and spacing the transistors sufficiently far apart so that the probability of a specified high-energy particle striking both transistors at the same time is remote.
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