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Semiconductor memory device having local data line pair with delayed precharge voltage application point
Semiconductor memory device having local data line pair with delayed precharge voltage application point
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机译:具有局部数据线对和延迟的预充电电压施加点的半导体存储器件
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摘要
Disclosed herein is a semiconductor memory device having a pair of local data lines with a delayed precharge voltage application point. The semiconductor memory device of the present invention includes a delay block for delaying the activation time of a block write control signal, thus lengthening the interval starting from the time when data on a pair of bit lines are amplified to the time when a supply voltage is applied to a pair of local data lines. Therefore, according to the semiconductor memory device of the present invention, the time when the supply voltage is applied to the pair of local data lines is the time after data have sufficiently stabilized on the pair of bit lines. Therefore, the semiconductor memory device of the present invention prevents the stabilization speed of the pair of bit lines and the pair of local data lines from decreasing, thus consequently improving the operating speed of the semiconductor memory device.
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