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Dynamic random access memory circuitry having storage capacitors within a well

机译:动态随机存取存储电路,在孔内具有存储电容器

摘要

A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory array, includes forming a dielectric well forming layer over a semiconductor substrate. A portion of the well forming layer is removed effective to form at least one well within the well forming layer. An array of memory cell capacitors is formed within the well. The peripheral memory circuitry is formed laterally outward of the well forming layer memory array well. In one implementation, memory circuitry includes a semiconductor substrate. A plurality of word lines is received over the semiconductor substrate. An insulative layer is received over the word lines and the substrate. The insulative layer has at least one well formed therein. The well has a base received over the word lines. The well peripherally defines an outline of a memory array area. Area peripheral to the well includes memory peripheral circuitry area. A plurality of memory cell storage capacitors is received within the well over the word lines. Peripheral circuitry is received within the peripheral circuitry area and is operatively configured to write to and read from the memory array.
机译:一种形成具有存储阵列的存储电路的方法,该存储阵列具有多个存储电容器,并且具有可操作地配置为向该存储阵列写入和从该存储阵列读取的外围存储电路,该方法包括在半导体衬底上方形成电介质阱形成层。有效地去除一部分阱形成层,以在该阱形成层内形成至少一个阱。在阱内形成存储单元电容器的阵列。外围存储电路形成在阱形成层存储器阵列阱的横向外侧。在一种实施方式中,存储电路包括半导体衬底。在半导体衬底上方接收多条字线。在字线和衬底上方接收绝缘层。绝缘层具有形成在其中的至少一个阱。孔的字线上方有一个底脚。阱在外围限定存储器阵列区域的轮廓。阱外围区域包括存储器外围电路区域。多个存储单元存储电容器被容纳在字线上的阱内。外围电路被接收在外围电路区域内并且被可操作地配置为向存储器阵列写入和从存储器阵列读取。

著录项

  • 公开/公告号US7026678B2

    专利类型

  • 公开/公告日2006-04-11

    原文格式PDF

  • 申请/专利权人 BELFORD T. COURSEY;

    申请/专利号US20030337817

  • 发明设计人 BELFORD T. COURSEY;

    申请日2003-01-06

  • 分类号H01L27/108;

  • 国家 US

  • 入库时间 2022-08-21 21:44:28

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