Microcontroller Operable in normal and low speed modes utilizing control signals for executing commands in a read-only memory during the low speed modes

摘要

A microcontroller includes a clock circuit with a register storing clock frequency information corresponding to a low speed or normal mode respectively operated by a low frequency or normal clock, which outputs a first signal according to a value set in the register when the low speed mode is designated during operation in the normal mode, a DRAM holding data, in the low speed mode, by operation in a self-refresh mode, and outputting a confirmation signal indicating switching to that mode, a DRAM circuit switching the DRAM to that mode based on the first signal, a ROM operated in the low speed mode, a remap circuit controlling an address circuit based on the confirmation signal, and outputting a second signal for switching a program execution address from the DRAM to an address of the ROM to control an address space in which a program is executed, the address circuit switching the address space based on the second signal.