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Memory controller which increases bus bandwidth, data transmission method using the same, and computer system having the same
Memory controller which increases bus bandwidth, data transmission method using the same, and computer system having the same
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机译:增加总线带宽的存储器控制器,使用该存储器控制器的数据传输方法以及具有该控制器的计算机系统
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摘要
A memory controller increases the effective bus bandwidth of a computer system. The memory controller includes a first port and a second port which receive and transmit N-bit data values, respectively; a third port receiving and transmitting 2N-bit data values; and a fourth port and a fifth port receiving and transmitting the N-bit data values, respectively. Here, two N-bit data values are simultaneously fetched from a memory device corresponding to the first port via the first port and a memory device corresponding to the second port in response to a command signal and an address input via the third port, the two fetched N-bit data values are combined into a 2N-bit data value, and the 2N-bit data value is transmitted to the third port. In addition, an N-bit data value is fetched from a corresponding memory device via the first port and/or second port in response to a command signal and address input via the fourth port and/or fifth port, and the fetched N-bit data value is transmitted to the fourth port and/or fifth port.
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