The memory controller in order to increase bus bandwidth, in the data transmission method of utilizing this and the computer system null

摘要

PROBLEM TO BE SOLVED: To provide a memory controller for obtaining the maximum system performance in a computer system.;SOLUTION: The memory controller is provided with first and second ports for inputting/outputting N bit data respectively, a third port for inputting/outputting 2N bit data and fourth and fifth ports for inputting/outputting the N bit data respectively, the N bit data are simultaneously fetched respectively from a corresponding memory device through the first and second ports in response to an instruction signal and an address to be inputted through the third port, the fetched 2N bit data are transmitted to the third port, the N bit data are fetched from the corresponding memory device through the first and/or the second port in response to the instruction signal and the address inputted through the fourth and/or the fifth port and the fetched N bit data are transmitted to the fourth and/or the fifth port.;COPYRIGHT: (C)2004,JPO