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Efficient implementation of multiple clock domain accesses to diffused memories in structured ASICs
Efficient implementation of multiple clock domain accesses to diffused memories in structured ASICs
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机译:在结构化ASIC中高效实现对分散存储器的多个时钟域访问
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摘要
A semiconductor device comprising one or more diffused memories and one or more diffused regions. The one or more diffused regions may be configured to provide one or more ports for the one or more diffused memories.
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