ASIC BIST controller employing multiple clock domains

摘要

A method and apparatus for performing a built-in self-test (“BIST”) on an integrated circuit device are disclosed. More particularly, in a first aspect, the invention includes a BIST comprising a first frequency domain in which LBIST operations are performed; a second frequency domain in which MBIST operations are performed; and a third frequency domain in which a test interface operates. In a second aspect, the invention includes a method for use in performing a BIST. This method comprises receiving an external clock signal in a testing interface, the external clock signal defining a first frequency domain; generating a first internal clock signal, the first internal clock signal defining a second frequency domain in which a LBIST may be performed; and generating a second internal clock signal, the second internal clock signal defining a third frequency domain in which MBIST may be performed.