METHOD AND CIRCUIT ARRANGEMENT FOR TESTING FUNCTIONS AND/OR ALGORITHMS IMPLEMENTED IN ELECTRICAL CIRCUITS

摘要

The invention relates to a method and a circuit arrangement for testing functions and/or algorithms implemented in electrical circuits, in particular, in digital circuits, whereby the circuit for testing is provided with preset input signals in a gate circuit, essentially unchanged with relation to normal operating mode, and the output signals, provided by the circuit are compared with given set values and an error is recognised, on a difference occurring between an output signal and a set value. During said method, on recognition of an error, the circuit is switched to a stable state.