首页> 外国专利> REDUCTION OF THE SETTLING TIME AND COMPENSATION OF PHASE ERRORS OF FREQUENCY SYNTHESIZERS BASED ON PHASE-LOCKING LOOPS

REDUCTION OF THE SETTLING TIME AND COMPENSATION OF PHASE ERRORS OF FREQUENCY SYNTHESIZERS BASED ON PHASE-LOCKING LOOPS

机译:基于锁相环的稳定时间的减少和频率合成器的相位误差补偿

摘要

The invention relates to a device and a method for generating an alternating quantity, especially by means of a frequency synthesizer comprising a phase-locking loop, in order to create a frequency curve and a phase angle. The inventive device and method are characterized by a control unit (8) for modulating and interfering with input signals fed into the phase-locking loop, a phase detector (7) for detecting the change in the leading edge regarding the input signals in accordance with the interferences, and an apparatus for compensating phase errors according to the detection.
机译:用于产生交变量的装置和方法技术领域本发明涉及一种用于产生交变量的装置和方法,特别是借助于包括锁相环的频率合成器,以便产生频率曲线和相位角。本发明的装置和方法的特征在于:控制单元(8)用于调制和干扰馈入锁相环的输入信号;相位检测器(7),用于根据输入信号检测关于输入信号的前沿的变化。干扰,以及根据检测来补偿相位误差的设备。

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