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Method for improving the performance of a multiprocessor system including a tasks waiting list and system architecture thereof

机译:改善包括任务等待列表的多处理器系统性能的方法及其系统架构

摘要

Processors (20a,21a,20b-22b,20c) are arranged in groups (Ga,Gb,Gc), each containing group of the processors. Each of the groups of processors includes an elementary waiting line (5a,5b,5c) for allowing a number of tasks. Each line operates according to a set priority while each of the tasks is associated with one of the processors. An Independent claim is included for: (a) an architecture of a data processing system
机译:处理器(20a,21a,20b-22b,20c)按组(Ga,Gb,Gc)排列,每个组包含一组处理器。处理器组中的每组都包括一个基本的等待线(5a,5b,5c),用于执行许多任务。每条线根据设置的优先级进行操作,而每个任务与一个处理器相关联。包含以下独立权利要求:(a)数据处理系统的体系结构

著录项

  • 公开/公告号EP1043658B1

    专利类型

  • 公开/公告日2006-07-05

    原文格式PDF

  • 申请/专利权人 BULL S.A.;

    申请/专利号EP20000400849

  • 发明设计人 ROGIER PIERRE;

    申请日2000-03-28

  • 分类号G06F9/46;

  • 国家 EP

  • 入库时间 2022-08-21 21:31:56

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