Clock divider, system including clock divider, and method for dividing clock and for reading and writing using the clock dividing

摘要

This invention relates to a system including a clock divider and a clock divider. The clock divider of the present invention, a counter for counting the first clock signal, based on the count value of the first clock signal from the counter counting the second clock signal and the clock-gating an input signal comparator which generates a read command, write command, the second clock signal and the clock-gating based on the input clock signal for generating a third clock signal and a gating circuit. The clock-gating circuit system including the generation is linked to the period of the third clock sinhoyi first clock signal and the second clock signal, without the addition of artificial buffer, margin of the read command in accordance with the period of the clock, the address margin and data majinreul is transmitted, can be secured, respectively, can be an effective closure timing (Timing closure), it is possible to reduce the power consumption.