首页> 外国专利> Digital memory circuit for high bandwidth memory, has multiplexer connected to spare memory and serial output port of shift register, which substitutes fault bit value of serial data stream with spare bit

Digital memory circuit for high bandwidth memory, has multiplexer connected to spare memory and serial output port of shift register, which substitutes fault bit value of serial data stream with spare bit

机译:用于高带宽存储器的数字存储电路,具有连接到备用存储器的多路复用器和移位寄存器的串行输出端口,用备用位代替串行数据流的故障位值

摘要

A base memory which includes defective memory cell, is connected to shift register having serial output port and parallel ports. A spare memory stores spare bit corresponding to a defective memory cell. A multiplexer (19) connected to spare memory and serial output port of shift register (10), substitutes fault bit value of serial data stream with spare bit. The shift register converts parallel read data at parallel port to serial data stream which is output to serial output port. The data stream includes fault bit corresponding to defective memory cell. The multiplexer has primary and secondary input nodes connected to serial output port and to spare memory. The multiplexer selects serial data stream and spare bit at primary and secondary input nodes. An independent claim is also included for method for redundancy providing method in memory.
机译:包括有缺陷的存储单元的基本存储器连接到具有串行输出端口和并行端口的移位寄存器。备用存储器存储与有缺陷的存储单元相对应的备用位。连接到备用存储器和移位寄存器(10)的串行输出端口的多路复用器(19)用备用位代替串行数据流的故障位值。移位寄存器将并行端口上的并行读取数据转换为串行数据流,然后将其输出到串行输出端口。数据流包括与有缺陷的存储单元相对应的故障位。多路复用器的主要和次要输入节点连接到串行输出端口和备用存储器。多路复用器选择主要和次要输入节点上的串行数据流和备用位。还包括用于存储器中的冗余提供方法的独立权利要求。

著录项

  • 公开/公告号DE20023741U1

    专利类型

  • 公开/公告日2005-12-08

    原文格式PDF

  • 申请/专利权人 RAMBUS INC. LOS ALTOS;

    申请/专利号DE2000223741U

  • 发明设计人

    申请日2000-09-13

  • 分类号G11C29;

  • 国家 DE

  • 入库时间 2022-08-21 21:21:04

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