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A leakage-tolerant wide-NOR dynamic logic circuit with a strong keeper
A leakage-tolerant wide-NOR dynamic logic circuit with a strong keeper
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机译:具有强大保持器的耐泄漏宽NOR动态逻辑电路
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摘要
The strong keeper 401 in a wide-NOR dynamic logic circuit is disabled briefly by a gating device 404 during the evaluation phase. The pull-down transistors 105 can thus pull down the dynamic node 104 without contention with the powerful keeper 401 which would otherwise overwhelm them. A strong keeper is required to maintain the precharged node potential because a large leakage current can flow in the large number of short-channel pull-down transistors 105. The circuit may be used in a memory array or in a wide domino-NOR gate. The keeper may comprise an inverter or a sense amplifier coupled to a feedback PMOS transistor.
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