首页> 外国专利> SCRAMBLING/DESCRAMBLING METHOD OF DATA-TO-BE-PROCESSED OF SEMICONDUCTOR DEVICE, ITS PROGRAM, SCRAMBLING/DESCRAMBLING CIRCUIT, AND SEMICONDUCTOR DEVICE PROVIDED WITH THEM

SCRAMBLING/DESCRAMBLING METHOD OF DATA-TO-BE-PROCESSED OF SEMICONDUCTOR DEVICE, ITS PROGRAM, SCRAMBLING/DESCRAMBLING CIRCUIT, AND SEMICONDUCTOR DEVICE PROVIDED WITH THEM

机译:半导体器件的待处理数据的加扰/解扰方法,其程序,其提供的加扰/解扰电路和半导体器件

摘要

PROBLEM TO BE SOLVED: To provide an encryption method of a data-to-be-processed of a semiconductor device which is excellent in a bus probing resistance, and its semiconductor device or the like.;SOLUTION: In the encryption method of the data-to-be-processed of the semiconductor device, an initial value of a key data to become a key for the encryption is placed in a storage portion outside a CPU. A generation of the key data and a scrambling/descrambling processing of the data-to-be-processed using the key data are achieved by using a general-purpose register inside the CPU or by a scrambling/descrambling circuit as a hardware. It is excellent in the bus probing resistance as the key data does not flow out to a peripheral bus therefor.;COPYRIGHT: (C)2007,JPO&INPIT
机译:解决的问题:提供一种具有优异的总线探测电阻的半导体器件的待处理数据的加密方法及其半导体器件等;解决方案:数据的加密方法在半导体装置的处理中,将成为加密用密钥的密钥数据的初始值放置在CPU外部的存储部中。通过使用CPU内部的通用寄存器或通过作为硬件的加扰/解扰电路来实现密钥数据的生成和使用该密钥数据的待处理数据的加扰/解扰处理。由于关键数据不会流到外围总线,因此它在总线探测电阻方面表现出色。;版权所有:(C)2007,JPO&INPIT

著录项

  • 公开/公告号JP2007251783A

    专利类型

  • 公开/公告日2007-09-27

    原文格式PDF

  • 申请/专利权人 NEC ELECTRONICS CORP;

    申请/专利号JP20060074875

  • 发明设计人 SHIMAZAKI SHINYA;

    申请日2006-03-17

  • 分类号H04L9/10;

  • 国家 JP

  • 入库时间 2022-08-21 21:14:28

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