首页> 外国专利> Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged

Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged

机译:即使被封装也可以进行预烧测试的半导体集成电路以及即使被封装的半导体集成电路也可以进行预烧测试的方法

摘要

A semiconductor integrated circuit and method for burn-in-testing are provided that uniformly apply stress to elements of the semiconductor integrated circuit in a burn-in test mode, even when packaged. The semiconductor integrated circuit may include a transmission control unit that transmits an operation signal in a normal operating mode and blocks the operation signal in the test mode; and a test control unit that sequentially outputs a first signal and a second signal to an input/output (I/O) circuit in the test mode.
机译:本发明提供了一种即使在封装时也可以在老化测试模式下将应力均匀地施加到半导体集成电路的元件上的用于老化测试的半导体集成电路和方法。所述半导体集成电路可以包括:传输控制单元,其在正常操作模式下发送操作信号并且在测试模式下阻止所述操作信号;以及测试控制单元,在测试模式下将第一信号和第二信号顺序输出到输入/输出(I / O)电路。

著录项

  • 公开/公告号US2007035320A1

    专利类型

  • 公开/公告日2007-02-15

    原文格式PDF

  • 申请/专利权人 KYE-HYUN KYUNG;

    申请/专利号US20060498928

  • 发明设计人 KYE-HYUN KYUNG;

    申请日2006-08-03

  • 分类号G01R31/02;

  • 国家 US

  • 入库时间 2022-08-21 21:05:33

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