Lithography method and system with correction of overlay offset errors caused by wafer processing

摘要

A method of controlling lithographic overlay offsets in the manufacture of semiconductor devices from wafers, comprising the steps of forming a lithographic pattern on a wafer layer with a lithographic tool, processing the wafer after the pattern is formed to enable fabrication of a semiconductor device, predicting overlay offset corrections based on one or more factors involved in the processing of the wafer, and utilizing the predicted overlay offset corrections to positionally control the lithographic tool.