首页> 外国专利> Wafer for preventing the formation of silicon nodules and method for preventing the formation of silicon nodules

Wafer for preventing the formation of silicon nodules and method for preventing the formation of silicon nodules

机译:用于防止硅结核形成的晶片和用于防止硅结核形成的方法

摘要

The present invention is directed to a wafer device method for processing same. A wafer for epitaxial deposition is backside sealed with a dopant seal layer (protection layer comprised of silicon dioxide or silicon nitride. Then, a layer of polysilicon is formed coextensively over the dopant seal layer. The polysilicon layer acts as a seed layer for potentially nodule forming gasses present during epitaxial deposition. During CVD epitaxy, the epitaxial layer is deposited on the primary surface with optimal resistivity uniformity. The fugitive gasses from the epitaxial process which diffuse to the wafer periphery and backside deposit as a film on the seed layer instead of in nodules. The polysilicon layer acts as a continuous seed layer which eliminates the preferential deposition at seal layer pinholes or island seed sites. The resulting structure of silicon substrate, dopant seal layer, polysilicon seed layer provides for nodule-free epitaxial deposition without increasing auto-doping and escalating the epitaxial resistivity non-uniformities.;Alternatively, the wafer is sealed on the backside and peripheral edges with a dopant seal layer. Then, a layer of polysilicon is formed over the entire extent of the dopant seal layer. CVD epitaxy is performed, growing an epitaxial layer on the front side and depositing a film layer on the back side and peripheral edges of the wafer. The fugitive gasses from the epitaxial process which diffuse to the wafer backside and edge deposit as a film on the seed layer instead of in nodules. The amount of out-gassing is reduced because the peripheral edges of the wafer are covered with the dopant seal layer and since that layer is not exposed to the reaction gases, silicon spur and nodule formation is thwarted.
机译:本发明涉及用于处理该晶片装置的方法。用掺杂剂密封层(由二氧化硅或氮化硅构成的保护层)在背面密封用于外延沉积的晶片。然后,在掺杂剂密封层上共延形成多晶硅层。多晶硅层用作潜在结节的籽晶层。在CVD外延期间,外延层以最佳的电阻率均匀性沉积在主表面上;外延过程中的逸散气体扩散到晶圆外围,背面沉积成膜而不是种子层上的薄膜多晶硅层作为连续的籽晶层,消除了在密封层针孔或岛状籽晶部位的优先沉积,所形成的硅衬底,掺杂剂密封层,多晶硅籽晶层的结构提供了无结节的外延沉积,而不会增加自发性掺杂并增大外延电阻率的不均匀性。然后用掺杂剂密封层将其背面和外围边缘密封。然后,在掺杂剂密封层的整个范围上形成多晶硅层。进行CVD外延,在正面上生长外延层,并在晶片的背面和外围边缘上沉积膜层。外延工艺产生的逃逸气体扩散到晶片的背面,边缘在种子层上而不是结节中成膜沉积。因为晶片的外围边缘被掺杂剂密封层覆盖,并且由于该层没有暴露于反应气体,所以减少了放气量,从而抑制了硅杂散和结节的形成。

著录项

  • 公开/公告号US7250358B2

    专利类型

  • 公开/公告日2007-07-31

    原文格式PDF

  • 申请/专利权人 CURTIS HALL;

    申请/专利号US20040913875

  • 发明设计人 CURTIS HALL;

    申请日2004-08-06

  • 分类号H01L21/20;

  • 国家 US

  • 入库时间 2022-08-21 21:01:11

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