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Test structures in unused areas of semiconductor integrated circuits and methods for designing the same
Test structures in unused areas of semiconductor integrated circuits and methods for designing the same
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机译:半导体集成电路未使用区域中的测试结构及其设计方法
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摘要
The present invention is test structures in unused areas of semiconductor integrated circuits and methods for designing the same. In an exemplary aspect of the present invention, a method for placing test structures in a semiconductor integrated circuit includes: (a) detecting a dummy area in a semiconductor integrated circuit, the semiconductor integrated circuit including probe pads on a top metal layer; (b) filling the dummy area with active test cells, the active test cells being connected to one another; and (c) connecting each of the active test cells to the probe pads with a metal line.
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