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Methods, algorithms, software, architectures and system for placing clocked components and routing timing signals in a circuit and/or layout

机译:用于在电路和/或布局中放置时钟组件和路由时序信号的方法,算法,软件,体系结构和系统

摘要

A method, algorithm, software, architecture and system for placing circuit components and routing wires. The method and algorithm generally include (a) placing components in an array of allowed locations, wherein each of the components receives a clock signal and each of the allowed locations is about the same distance from a first nearest neighbor along at least a first axis as are other allowed locations along said first axis, and (b) one of the following: (i) independently routing a plurality of combinational paths from at least two components to at least two other components, (ii) routing the clock signal to the components, or both (i) and (ii). The present method, algorithm, software, architecture and system advantageously reduce power and/or current consumption in integrated circuits, improve uniformity of timing for signal paths between clocked circuit components, and/or ensure that timing requirements for signal paths between clocked circuit components are met automatically.
机译:一种用于放置电路组件和布线的方法,算法,软件,体系结构和系统。所述方法和算法通常包括:(a)将组件放置在允许位置的阵列中,其中,每个组件接收时钟信号,并且每个允许位置沿着至少第一轴线与第一最近邻居的距离大致相同。沿所述第一轴的其他允许位置,以及(b)以下之一:(i)从至少两个组件到至少两个其他组件独立地路由多个组合路径,(ii)将时钟信号路由到这些组件,或(i)和(ii)两者。本方法,算法,软件,体系结构和系统有利地减少了集成电路中的功率和/或电流消耗,提高了时钟电路组件之间的信号路径的时序的均匀性,和/或确保了时钟电路组件之间的信号路径的时序要求得到满足。自动相遇。

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