INTEGRATED APPROACH FOR DESIGN, SIMULATION AND VERIFICATION OF MONOLITHIC, SILICON-BASED OPTO-ELECTRONIC CIRCUITS

摘要

Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: 1) digital electronic integrated circuit elements (12); 2) analog/mixed signal electronic integrated circuit elements (14); and 3) opto-electronic elements (16) (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated (18). physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified (26), to assess the properties of the overall physical design. The results of the co-simulation (18) are compared to t results of the co-verification (26), with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considere to provide a final product ("tape out").