首页>
外国专利>
DUAL BIT MULTI-LEVEL BALLISTIC MONOS MEMORY, AND MANUFACTURING METHOD, PROGRAMMING, AND OPERATION PROCESS FOR THE MEMORY
DUAL BIT MULTI-LEVEL BALLISTIC MONOS MEMORY, AND MANUFACTURING METHOD, PROGRAMMING, AND OPERATION PROCESS FOR THE MEMORY
展开▼
机译:双比特多级弹道记忆存储器及其制造方法,编程和操作过程
展开▼
页面导航
摘要
著录项
相似文献
摘要
In this invention, a fast low voltage ballistic program, ultra-short channel, ultra-high density, dual-bit multi-level flash memory is disclosed with a two or three polysilicon split gate side wall process and it operation. The structure and operation of this invention is enabled by a twin MONOS cell structure having an ultra-short control gate channel. The cell structure is realized by (i) placing side wall control gates (240) over a composite of Oxide-Nitride-Oxide (ONO) (230) on both sides of the word gate (245), and (ii) forming the control gates and bit impurity layer by self-alignment and sharing the control gates and bit impurity layers between neighboring memory cells for high density. Key elements used in this process are: 1) Disposable side wall process to fabricate the ultra short channel and the side wall control gate with or without a step structure, and 2) Self-aligned definition of the control gate over the storage nitride and the impurity layer.
展开▼