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STRUCTURES AND DESIGNS FOR IMPROVED EFFICIENCY AND REDUCED STRAIN III-NITRIDE HETEROSTRUCTURE SEMICONDUCTOR DEVICES

机译:效率提高和应变降低的III型氮化物异质结构半导体器件的结构和设计

摘要

The present invention provides semiconductor structures, and methods for making semiconductor structures, comprising an InA1N and/or InA1GaN strain relief layer that have a lattice constant larger than that of a substrate film upon which it is grown such that it allows the growth of strain-free or low-strain semiconductor devices.
机译:本发明提供了半导体结构及其制造方法,其包括InA1N和/或InA1GaN应变消除层,其晶格常数大于在其上生长的衬底膜的晶格常数,从而允许应变生长。自由或低应变半导体器件。

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