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FFT ACCELERATED ITERATIVE MIMO EQUALIZER RECEIVER ARCHITECTURE
FFT ACCELERATED ITERATIVE MIMO EQUALIZER RECEIVER ARCHITECTURE
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机译:FFT加速迭代MIMO均衡器接收器架构
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摘要
A receiver, such as a CDMA MIMO receiver, includes a LMMSE-based chip-level equalizer constructed so as to implement a FFT accelerated iterative algorithm having a complexity of order O(Nlog2(N)), where N is the dimension of a covariance matrix. The equalizer uses one of an overlap-save or an overlap-add FFT architecture.
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