Fabrication method of dual damascene interconnections of microelectronics and microelectronics having dual damascene interconnections fabricated thereby

摘要

Exemplary embodiments of the invention generally include methods for forming multilayer metal interconnect structures using dual damascene methods that incorporate a via capping process to protect lower interconnection lines from etching damage or oxidation, for example, that may be caused by inadvertent exposure of lower interconnection lines to etching atmospheres.