首页> 外国专利> PALLADIUM-GOLD PLATING PROCESS TO SOLVE A LARGE THICKNESS DISTRIBUTION ON HIGH DENSITY PRINTED CIRCUIT BOARD AND PRINTED CIRCUIT BOARD PRODUCED THEREFROM

PALLADIUM-GOLD PLATING PROCESS TO SOLVE A LARGE THICKNESS DISTRIBUTION ON HIGH DENSITY PRINTED CIRCUIT BOARD AND PRINTED CIRCUIT BOARD PRODUCED THEREFROM

机译:解决高密度印刷电路板和印制电路板印刷电路板上大厚度分布的钯金镀覆工艺

摘要

The present invention relates to a plating method for solving the thickness deviation of plating, which occurs in a high-density printed circuit board, and a printed circuit board produced thereby. This invention features that a first porous palladium (Pd) plating layer is formed on an exposed soldering portion and a wire-bonding portion of the printed circuit board, which is made of copper or copper alloy, by means of a substitution plating method, a secondary palladium or palladium alloy plating layer is formed on the first plating layer by means of an electroless reduction plating method, and then a gold (Au) or gold alloy plating layer is precipitated and formed on the second plating layer by means of the substitution plating method using the difference of ionization tendency.
机译:本发明涉及一种用于解决在高密度印刷电路板上出现的电镀厚度偏差的电镀方法,以及由此生产的印刷电路板。本发明的特征在于,通过替代镀覆方法,在由铜或铜合金制成的印刷电路板的裸露的焊接部分和引线接合部分上形成第一多孔钯(Pd)镀层,并且通过化学还原镀覆法在第一镀覆层上形成第二钯或钯合金镀覆层,然后通过置换镀覆沉积金(Au)或金合金镀覆层并形成在第二镀覆层上方法利用电离倾向的差异。

著录项

  • 公开/公告号KR100712033B1

    专利类型

  • 公开/公告日2007-04-20

    原文格式PDF

  • 申请/专利权人 YMT CO. LTD.;

    申请/专利号KR20060022024

  • 发明设计人 CHUN SUNG WOOK;

    申请日2006-03-09

  • 分类号H05K3/24;H05K3/18;

  • 国家 KR

  • 入库时间 2022-08-21 20:32:20

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