首页> 外国专利> INSULATED GATE BIPOLAR TRANSISTOR WITH MULTIPLE TRENCH AND METHOD FOR MENUFACTURING INSULATED GATE BIPOLAR TRANSISTOR WITH MULTIPLE TRENCH

INSULATED GATE BIPOLAR TRANSISTOR WITH MULTIPLE TRENCH AND METHOD FOR MENUFACTURING INSULATED GATE BIPOLAR TRANSISTOR WITH MULTIPLE TRENCH

机译:具有多个沟槽的绝缘栅双极晶体管及制造具有多个沟槽的绝缘栅双极晶体管的方法

摘要

An insulated gate bipolar transistor using a multiple trench is provided to improve a latch-up characteristic by forming an oxide layer after a portion of a bipolar transistor in which a hole current path is formed is removed by a trench process. A polysilicon gate(220) is formed in the center of a cell in one cell pitch. A trench-type insulation region(210) is formed of the sidewall on the edge of the cell. An electrode(230) is formed between the polysilicon gate and the trench-type insulation region, made of a conductor. The polysilicon gate can have such a depth as to penetrate N-type and P-type regions of a high density and reach an N-type region of a low density.
机译:提供一种使用多沟槽的绝缘栅双极型晶体管,以在通过沟槽工艺去除了形成有空穴电流路径的双极型晶体管的一部分之后,通过形成氧化物层来改善闩锁特性。多晶硅栅(220)以一个单元间距形成在单元的中心。沟槽型绝缘区域(210)由单元边缘上的侧壁形成。电极(230)形成在多晶硅栅极和由导体制成的沟槽型绝缘区域之间。多晶硅栅极的深度可以穿透高密度的N型和P型区域并到达低密度的N型区域。

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