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Memory cells unit for a nonvolatile ferroelectric memory, nonvolatile ferroelectric memory with a plurality of these cells, word line driver for the same as well as a method for the preparation of these cells
Memory cells unit for a nonvolatile ferroelectric memory, nonvolatile ferroelectric memory with a plurality of these cells, word line driver for the same as well as a method for the preparation of these cells
Memory cells unit for a nonvolatile ferroelectric memory, with:– a first transistor (t1, 70) with a source, a drain and a gate with a first word line (swl1, 74) of a word line pair (swl1, swl2) is connected;– a first ferroelectric capacitor (c1, 71) whose one electrode is connected with the source of the first transistor (t1, 70) and the other electrode is connected with a second word line (swl2, 75) of the word line pair (swl1, swl2) is connected;– a second transistor (t2, 72) with a source, a drain and a gate with the second word line (swl2, 75) is connected, in conjunction with the first ferroelectric capacitor (c1, 71) is;– a second ferroelectric capacitor (c2, 73), whose one electrode is connected with the source of the second transistor (t2, 72) is connected and the other electrode is connected with the first word line (swl1, 74) is connected, in conjunction with the gate of the first transistor (t1,..
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