首页> 外国专利> Layout schemes and methods of power gating transistor switches, semiconductor devices including the power gating transistor switches, and power gating methods of the semiconductor devices

Layout schemes and methods of power gating transistor switches, semiconductor devices including the power gating transistor switches, and power gating methods of the semiconductor devices

机译:功率门控晶体管开关,包括该功率门控晶体管开关的半导体器件以及该半导体器件的功率门控方法的布局方案和方法

摘要

A semiconductor device may include a logic circuit and one or more power gating transistor switches. The logic circuit may be connected between a power voltage and a ground voltage, and may perform one or more logic operations. The one or more power gating transistor switches may include a plurality of power gating transistors and poly resistors, and may switch application of the power voltage to the logic circuit according to an active mode, a sleep mode, or active and sleep modes of the logic circuit. The one or more power gating transistor switches may use the poly resistors to sequentially apply the power voltage to the logic circuit, to sequentially block the application of the power voltage to the logic circuit, or to sequentially apply the power voltage to the logic circuit and to sequentially block the application of the power voltage to the logic circuit.
机译:一种半导体器件可以包括逻辑电路和一个或多个功率门控晶体管开关。逻辑电路可以连接在电源电压和地电压之间,并且可以执行一个或多个逻辑操作。一个或多个功率门控晶体管开关可以包括多个功率门控晶体管和多晶硅电阻器,并且可以根据逻辑的激活模式,睡眠模式,或者激活和睡眠模式来将电源电压的施加切换到逻辑电路。电路。一个或多个功率门控晶体管开关可使用多晶硅电阻器将功率电压顺序地施加到逻辑电路,将功率电压顺序地阻止施加到逻辑电路,或者将功率电压顺序地施加到逻辑电路,并且顺序阻止电源电压施加到逻辑电路。

著录项

  • 公开/公告号US2008018389A1

    专利类型

  • 公开/公告日2008-01-24

    原文格式PDF

  • 申请/专利权人 KWANG-IL KIM;KYOUNG-KUK CHAE;

    申请/专利号US20070812577

  • 发明设计人 KWANG-IL KIM;KYOUNG-KUK CHAE;

    申请日2007-06-20

  • 分类号H03K17;

  • 国家 US

  • 入库时间 2022-08-21 20:14:34

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号